Digital Logic Simulator

What you will learn

• Software: Depending on how you architect this, fairly sophisticated! Work with graphs, and best done using OOD.
• Domain: Digital logic circuits, and the sheer exponentiality of 2n2n

This is pretty advanced but will be pretty cool. We will build a digital circuit simulator in this exercise. We will also parallelize it using a pretty cool technique and will add timing analysis and fault simulation as well.

You could do this in python, but if you want to do the parallel simulator, you will need to use C or C++ (maybe Java?)

SimSim (Simple Simulator)

We will create a graph to represent the circuit in this part. To start with, we will create nodes and edges connecting nodes. The nodes will have a basic type (NOT, AND, OR, etc.). The nodes will be connected to each other to form a circuit; each node will have a specific number of inputs but can drive multiple other gates. We will have special nodes called Primary Inputs (PIs) and Primary Outputs (POs).

Each node ‘reads’ its inputs — the values on its input edges and determines its output value based on its type. It places this value on its output edge(s).

Create a circuit, apply patterns to the PIs and see if the POs match what you expect. You should be able to cycle through the truth table of your circuit to verify the output.

FaultSim (Fault Simulator)

A simple fault model is a ‘Stuck-at-‘ model. Tie an edge to a constant 00 or 11 and see if you can detect this at the POs.

Rather than simulating all possible input values, can you figure out a minimal set that can detect all possible faults?

TimeSim (Timing Simulator)

SimSim calculates the output values directly, it has no notion of gate and propagation delays.

Assign delays to each gate (and what the heck, to each connection as well). For example, an inverter can have a delay of  1 time units, a NAND gate of  2 and a NOR gate of 3 time units (hmm, why these three values?). Now, set up a global clock, and calculate the outputs at each time step. Compared to SimSim, the final value of POs will settle after a few time units.

And they may bounce around before settling! Can you set up a circuit so that you see glitches at the output?

ParSim (Parallel Simulator)

This is a unique form of parallelism!

In all of the above simulators, the values are 1 bit at each PI, gate output, and PO. The function evaluation at each gate is also a bitwise operation. However, we could instead treat each of these as a 32 (or longer!) bit int and do the same logical operations on the entire word! This will take exactly the same amount of time as before, but we’ll be running 32 tests in parallel. Do you see what I meant by calling it a unique form of parallelism?

Generalizations

• Read in a circuit from a file
• Read in inputs and outputs from a file